[manticore] Re: FIFO

[Ling Andrew Chaang]

how are you guys testing the stuff,

are you loading it onto the board or what??

Andrew

On Wed, 5 Jun 2002 benjcarson at digitaljunkies.ca wrote:

> > Benj, any signal feature requests, say 3/4 full or something?
> > Right now it has a full and empty signal, synch clear, asynch reset. 
> > 
> 
> 1/2 full?  I think we might use that somewhere and perhaps a level signal 
> (that basically reports the difference between the read & write "pointers"). 
> That one might be slightly tricky to implement generically and to optimize.  
> Actually, you could just use an up/down counter that is wide enough to 
> register the depth of the fifo...  What do you think? 
> 
> Benj
>