[manticore] Re: FIFO issues

[Jeff Mrochuk]

Come to think of it lpm_ram should work fine.  The read and write
signals can be directly wired (maybe with a few gates for control) and
the addresses being access will be the pointers.  I'll give it a shot
tommorow.

On Wed, 2002-06-05 at 22:15, benjcarson at digitaljunkies.ca wrote:
> You have to use lpm_ram as registers to use esb bits, as far as I know.  I 
> don't think using lpm_ram is too vendor specific since I think most FPGAs 
> have ram or can emulate it using normal registers.  Just my $0.02. 
> 
> Benj 
> 
> 
> Jeff Mrochuk writes: 
> 
> > Here's one for ya.
> >  
> > I tried to compile my fifo, and even with only 32x8 its gigantic (14% of our 
> > chip)
> > So I took a look at their design and it turns out the reason its so small is 
> > because it uses ESB bits.  If you disable ESB bits on the altera fifo, our 
> > 640x8 fifo is 103% of the chip.
> >  
> > Looks like we may have to be a bit more creative in our display, maybe empty 
> > it as it fills.  I'd like to know how commercial hardware does it, maybe it 
> > just has giant fifo hardware.
> >  
> > In the mean time, do you know if you can tell quartus to use ESB bits on your 
> > own designs?
> >  
> > Jeff 
> > 
> > 
>  
>