[bf1942] Sparc

Stan Hoeppner Stan at hardwarefreak.com
Mon Jun 2 10:45:38 EDT 2003

> I imagine that most operations an on x86 can be 
> expressed fairly 
> closely with a similar number of instructions on a SPARC.

SPARC (Scalable Processor ARChitecture) is a fairly clean RISC architecture,
and thus it will take quite a few SPARC machine instructions per x86
instruction, in some cases.  For loads and stores, it's probably a
one-to-one ratio.  In nasty cases, like say DJNZ (if this is still a valid
x86 instruction--been a while since I dealt with assembly), it would take
many SPARC instructions..

stan at hardwarefreak.com

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