Matt,<br><br>I try to maintain the SGI MIPS/IRIX port of IOQuake3, and I've actually been looking into getting a VM running for MIPS. As far as I have seen, there isn't any documentation on it. =(<br>A good first step is to learn the VM's instructions and behaviors. I can't find any good documentation on this, so I've been referencing the x86 and interpreted (vm_x86.c and vm_interpreted.c respectively) and basically trying to get an idea of what each instruction is accomplishing. code/qcommon/vm_local.h gives the VM opcodes, but unless you are familiar with assembler mnemonics, you may not be able to make heads or tails of it.<br>
<br>Generally, knowing how the VM is used from inside Quake3 will help a lot in debugging too.<br><br>Next, you need to know the calling convention of your target processor/platform. For example, I use N32 calling convention on MIPS, which means the first eight arguments to a function are passed in %r4-%r11. Stack must be quadword aligned (8-byte). Values are stored as 64-bit values on stack. Return register is %r31. These sorts of things. You'll need to be interfacing the Q3VM with native C code. The compiler assumes that any function being called, including ones with dynamically generated assembly code, follow these rules and have defined behavior, so you have to play ball with those rules.<br>
<br>You'll need to write code to emit instructions for your processor type. That's pretty trivial, just get a architecture reference manual and have at it. I have a tiny project called libMIPS that includes a lot of opcodes for MIPS IV processors so I can easily write dynamic assembly generation programs without having to recode the ISA part every time.<br>
<br>Other issues you might want to consider is if your platform allows for code from stack/heap to be executed, and how you can fix it so that it can. If you are generating instructions for a processor, can older processors still execute it? For example, MIPS III doesn't include all of the instructions of MIPS IV, so if I want any SGI machines that have MIPS III compatible processors to run Q3, I need to not generate MIPS IV ones. That sort of thing.<br>
<br>Otherwise, I suggest you spend a lot of time just running through those two files and try to understand its behavior. I can't say I've spent a lot of time on it, but I have some general ideas of how it works. If you are working on a MIPS one, then I wouldn't mind working with you.<br>
<br>Patrick Baggett<br><br>Other than that, I'd suggest that you <br><br><div class="gmail_quote">On Sat, Apr 19, 2008 at 2:45 PM, Matt Turner <<a href="mailto:mattst88@gmail.com">mattst88@gmail.com</a>> wrote:<br>
<blockquote class="gmail_quote" style="border-left: 1px solid rgb(204, 204, 204); margin: 0pt 0pt 0pt 0.8ex; padding-left: 1ex;">If someone was to implement a VM for another architecture (mips, alpha, sparc), what would be involved? Is there any documentation on this? Can someone give an overview of how the is used in Quake3? Any information welcome.<br>
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<br>Matt Turner<br>
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