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<body><span class="vcard"><a class="email" href="mailto:arny@ats.s.bawue.de" title="Thilo Schulz <arny@ats.s.bawue.de>"> <span class="fn">Thilo Schulz</span></a>
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<a class="bz_bug_link
bz_status_NEW "
title="NEW - vm_x86.c inline assembly error on hosts using -fPIC"
href="https://bugzilla.icculus.org/show_bug.cgi?id=6429">bug 6429</a>
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<td>arny@ats.s.bawue.de
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<b><a class="bz_bug_link
bz_status_NEW "
title="NEW - vm_x86.c inline assembly error on hosts using -fPIC"
href="https://bugzilla.icculus.org/show_bug.cgi?id=6429#c2">Comment # 2</a>
on <a class="bz_bug_link
bz_status_NEW "
title="NEW - vm_x86.c inline assembly error on hosts using -fPIC"
href="https://bugzilla.icculus.org/show_bug.cgi?id=6429">bug 6429</a>
from <span class="vcard"><a class="email" href="mailto:arny@ats.s.bawue.de" title="Thilo Schulz <arny@ats.s.bawue.de>"> <span class="fn">Thilo Schulz</span></a>
</span></b>
<pre>Hey Mark.
Indeed, I didn't think about PIC when I was updating the vm_x86.c JIT.
In fact, I still don't know very much about it.
Could you try compiling it PIC with gcc5?
<a href="https://software.intel.com/en-us/blogs/2014/12/26/new-optimizations-for-x86-in-upcoming-gcc-50-32bit-pic-mode">https://software.intel.com/en-us/blogs/2014/12/26/new-optimizations-for-x86-in-upcoming-gcc-50-32bit-pic-mode</a>
Otherwise, one could try to push / pop the EBX register in the inlined asm
around the calll.
Furthermore, Syscalls would also need to restore EBX to the Global Offset Table
address before jumping back into engine code. The address of the GOT should be
known to the JIT Compiler and could be emitted by the EmitCallDoSyscall() to do
just that.</pre>
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